Meets:
Monday, Wednesday, & Friday, Aug. 28 - Dec. 8, 10 - 10:50 a.m., Engineering 170.
Bulletin description:
Review of basic computer architecture. Evaluation of architecture
performance. Design and evaluation of instruction sets. Pipeline
processors and instruction scheduling. Vector processors. Memory
hierarchy and design including cache, main and virtual memories.
Memory protection schemes. Input/output and its relation to system
performance. Prerequisites: COEN 171 and Senior standing with
a 3.000 Q.P.A. or better, or consent of instructor
See Testimonial from a former student
who met Robert Tomasulo
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